Microelectronic devices used in fabricating integrated circuits are manufactured by employing photolithographic techniques. Fabricating various structures, particularly electronic device structures, typically involves depositing at least one layer of a photosensitive material, generally known as a photoresist material, on a substrate. The photoresist material may then be patterned by exposing it to radiation of a certain wavelength to alter characteristics of the photoresist material. In many instances, the radiation is from ultraviolet range of wavelengths causing desired photochemical reactions to occur within the photoresist. The photochemical reactions typically change the solubility characteristics of the photoresist, thereby permitting removal of certain selected portions of the photoresist while maintaining the other portions on the substrate. The selective removal of certain parts of the photoresist allows for protection of certain areas of the substrate while exposing other areas. The portions of the photoresist that remain on the substrate are used as a mask or stencil for processing the underlying substrate.
As methods for producing miniature electronic structures improve, the desire to produce even smaller structures has continued to increase. Problems encountered in further device miniaturization include obtaining desired resolution in the radiation source and improved focusing resolution and depth of focus of the radiation on the photoresist. Other problems encountered include radiation leakage through the mask. Radiation leakage has been addressed by ensuring that the radiation to which the mask and photoresist are exposed is well within the deep UV range and, in particular, less than 245 nanometers in wavelength. Additionally, the problem of long exposure time exists to increase the penetration of the UV radiation through planarization layers. Further problems include the ability of the patterns formed in the resist to withstand high power dry processes without the loss of the image integrity.
Progress in processes for forming structures and photoresists has led to the creation of sub-micron and even sub-half-micron structures. For instance, structures as small as 0.25 micron have been created. However, a common problem encountered as structure size has decreased is that thinner layers of photoresist must be used to ensure, among other things, that depth of focus requirements of the exposure tool are met. Also, thinner layers are preferable for high resolution imaging. The exposure tool refers to the radiation source, optics, mask and other components used to expose the photoresist. The photoresist used, especially at such lesser thicknesses, are highly transmissive of ultraviolet wavelengths used. The transmissivity of the photoresist coupled with the high reflectivity of the UV wavelengths of commonly used substrates results in the reflection of the UV radiation back into the photoresist, resulting in further photochemical reactions taking place in the photoresist. The further photochemical reactions resulting from the UV radiation reflected off of the surface typically result in uneven exposure of the photoresist.
As the light is reflected off of the substrate, standing waves may be created. As a result, the structure which was intended to be created by the mask will not be created, as particularly evidenced by inconsistent feature dimensions. This results in device error and possibly failure.
In order to address the transmissivity and reflectivity problems, anti-reflective coatings have been developed which are applied to substrates prior to applying the photoresist. As the photoresist is exposed to UV radiation, when the anti-reflective coating or ARC is an inorganic material it bounces back any light at about a 1/4 wavelength offset, thereby resulting in wave cancellation. In the case of an organic anti-reflective coating, such typically absorbs light thereby minimizing reflection. The ARC greatly reduces the impact of highly reflective substrate surfaces as well as the impact of grainy substrate surfaces and topographical features on the substrate surface during deep UV imaging. Both inorganic and organic ARC films have been used. Typical inorganic films are silicon nitride, silicon oxynitride and titanium nitride. Although ARC has been quite useful to alleviate problems associated with reflectivity of substrate surfaces, problems still exist as structures become smaller and smaller, and especially when dealing with substrates that have a non-planar topography. For instance, when dealing with structures having shallow trench isolation (STI) and for instance less than 0.25 micron polysilicon gate dimension, a tendency exists for the thickness of the photoresist and anti-reflective coating to vary which in turn can result in the line width of the polysilicon varying due to thin film interference effects. Thin film interference effects cause necking of polysilicon lines and up to about 50 nanometers polysilicon line width variation. For instance, as schematically illustrated in FIG. 1, recesses or protrusions of underlying STI structure (10), can cause resist (18) and ARC (16) thickness variations at corners due to the recess STI, as well as local and global variations in resist and arc thickness.
Photoresist systems and inorganic anti-reflective coatings are tuned to perform optimally on a quarter wavelength reflectivity; therefore, thickness variation of either or both causes variation in the dimensions of the printed feature. More recently developed anti-reflective coatings exhibiting reduced swing curves have been developed for achieving improved line width control; however, resist thickness and ARC variations remain problematic.
In fact, current processes used for defining more conventional polysilicon gate dimensions are not extendable to technologies desiring dimensions of 0.25 microns and below. For instance, a current process used for polysilicon gate definition involves using a silicon oxinitride CVD ARC (16) conformably coated over polysilicon layer (12) (see FIG. 2A). Photoresist 18 is coated over the ARC layer (16). The photoresist layer (18) is patterned and remains in place while the underlying SiON (16) and polysilicon (12) are defined such as using reactive ion etching (RIE) (see FIG. 2B). The photoresist 18 and SiON (16) are then stripped such as using RIE and/or wet H.sub.2 PO.sub.4 etching composition (see FIG. 2C). However, the stripping procedures for removing the photoresist 18 and SiON 16 exhibit a tendency to cause device performance problems because of exposure of the polysilicon gates, STI, gate oxides and diffusions and ARC strip processes. Also, having the resist present during etching of the polysilicon can cause less of selectivity to oxide, which is especially significant on gate oxides of less than 40 .ANG..